Electronics | Free Full-Text | Layout Strengthening the ESD Performance for High-Voltage N-Channel Lateral Diffused MOSFETs
Mix‐mode forward‐biased diode with low clamping voltage for robust ESD applications - Qi - 2020 - Electronics Letters - Wiley Online Library
Electronics | Free Full-Text | The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology
High holding voltage SCR for robust electrostatic discharge protection
Snapback behavior determines ESD protection effectiveness - SemiWiki
Snapback behavior determines ESD protection effectiveness - SemiWiki
Technical considerations and protection mechanism for ESD event...
Figure 1 from Snapback Breakdown Dynamics and ESD Susceptibility of LDMOS | Semantic Scholar
MODELING NMOS SNAPBACK CHARACTERISTIC USING PSPICE 1. Introduction 2. NMOS SNAPBACK
Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high current simulations | Semantic Scholar
Basics in ESD Protection of Radio Frequency Integrated Circuits | SpringerLink
PDF) Snapback circuit model for cascoded NMOS ESD over-voltage protection structures
Technical considerations and protection mechanism for ESD event...
Snapback breakdown ESD device based on zener diodes on silicon-on-insulator technology - ScienceDirect
Figure 1 from A Method to Prevent Strong Snapback in LDNMOS for ESD Protection | Semantic Scholar
High Trigger Current NPN Transistor With Excellent Double-Snapback Performance for High-Voltage Output ESD Protection | Semantic Scholar
Snapback behavior determines ESD protection effectiveness - SemiWiki
Time to say farewell to the snapback ggNMOS for ESD protection – SOFICS – Solutions for ICs
Characterization for ESD Design, the TLP Zoo: Part 1 | EOS/ESD Association, Inc.
Electronics | Free Full-Text | The ESD Characteristics of a pMOS-Triggered Bidirectional SCR in SOI BCD Technology
GGNMOS ESD Protection Simulation
Bipolar effects in snapback mechanism in advanced n-FET transistors under high current stress conditions
Measured IV-curve and simplified model for ESD-protection elements with... | Download Scientific Diagram
Bipolar effects in snapback mechanism in advanced n-FET transistors under high current stress conditions
Figure 1 from Measurement on snapback holding voltage of high-voltage LDMOS for latch-up consideration | Semantic Scholar
GGNMOS ESD Protection Simulation
Technical considerations and protection mechanism for ESD event...
